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Index ⭢ AArch64 Backend

AArch64 Backend [¶]

AArch64 backend.

Emitters

Supported Instructions

  • Emitters:
    • a64::EmitterExplicitT - Provides all instructions that use explicit operands, provides also utility functions. The member functions provided are part of all AArch64 emitters.
  • Instruction representation:

Register Operands

  • a64::Gp - General purpose register (abstracts 32-bit and 64-bit general purpose registers).
  • a64::Vec - Vector register (abstracts B, H, S, D, and Q NEON register with possible element type and index).

Memory Operands

  • a64::Mem - AArch64 memory operand that provides support for all ARM addressing features including base, index, pre/post increment, and ARM-specific shift addressing + index extending.

Other

  • arm::Shift - Shift operation and value.
  • arm::Utils - Utilities that can help during code generation for AArch32 and AArch64.

Enumerations

Functions

Variables

Shift Operation Construction

Memory Operand Construction

a64::VecElementType : uint32_tenum class[¶]

Vector element type (AArch64).

ConstantDescription
kNone 

No element type specified.

kB 

Byte elements (B8 or B16).

kH 

Halfword elements (H4 or H8).

kS 

Singleword elements (S2 or S4).

kD 

Doubleword elements (D2).

kB4 

Byte elements grouped by 4 bytes (B4).

Note

This element-type is only used by few instructions.

kH2 

Halfword elements grouped by 2 halfwords (H2).

Note

This element-type is only used by few instructions.

kMaxValue 

Maximum value of VecElementType.

Shift a64::lsl(
uint32_t value
)constexprstaticnoexcept[¶]

Constructs a LSL #value shift (logical shift left).

Shift a64::lsr(
uint32_t value
)constexprstaticnoexcept[¶]

Constructs a LSR #value shift (logical shift right).

Shift a64::asr(
uint32_t value
)constexprstaticnoexcept[¶]

Constructs a ASR #value shift (arithmetic shift right).

Shift a64::ror(
uint32_t value
)constexprstaticnoexcept[¶]

Constructs a ROR #value shift (rotate right).

Shift a64::rrx()constexprstaticnoexcept[¶]

Constructs a RRX shift (rotate with carry by 1).

Shift a64::msl(
uint32_t value
)constexprstaticnoexcept[¶]

Constructs a MSL #value shift (logical shift left filling ones).

Gp a64::w(
uint32_t id
)constexprstaticnodiscardnoexcept[¶]

Creates a 32-bit W register operand.

Gp a64::gp32(
uint32_t id
)constexprstaticnodiscardnoexcept[¶]

Creates a 32-bit W register operand.

Gp a64::x(
uint32_t id
)constexprstaticnodiscardnoexcept[¶]

Creates a 64-bit X register operand.

Gp a64::gp64(
uint32_t id
)constexprstaticnodiscardnoexcept[¶]

Creates a 64-bit X register operand.

Vec a64::b(
uint32_t id
)constexprstaticnodiscardnoexcept[¶]

Creates an 8-bit B register operand.

Vec a64::h(
uint32_t id
)constexprstaticnodiscardnoexcept[¶]

Creates a 16-bit H register operand.

Vec a64::s(
uint32_t id
)constexprstaticnodiscardnoexcept[¶]

Creates a 32-bit S register operand.

Vec a64::d(
uint32_t id
)constexprstaticnodiscardnoexcept[¶]

Creates a 64-bit D register operand.

Vec a64::q(
uint32_t id
)constexprstaticnodiscardnoexcept[¶]

Creates a 1282-bit V register operand.

Vec a64::v(
uint32_t id
)constexprstaticnodiscardnoexcept[¶]

Creates a 1282-bit V register operand.

Shift a64::uxtb(
uint32_t value
)constexprstaticnodiscardnoexcept[¶]

Constructs a UXTB #value extend and shift (unsigned byte extend) (AArch64).

Shift a64::uxth(
uint32_t value
)constexprstaticnodiscardnoexcept[¶]

Constructs a UXTH #value extend and shift (unsigned hword extend) (AArch64).

Shift a64::uxtw(
uint32_t value
)constexprstaticnodiscardnoexcept[¶]

Constructs a UXTW #value extend and shift (unsigned word extend) (AArch64).

Shift a64::uxtx(
uint32_t value
)constexprstaticnodiscardnoexcept[¶]

Constructs a UXTX #value extend and shift (unsigned dword extend) (AArch64).

Shift a64::sxtb(
uint32_t value
)constexprstaticnodiscardnoexcept[¶]

Constructs a SXTB #value extend and shift (signed byte extend) (AArch64).

Shift a64::sxth(
uint32_t value
)constexprstaticnodiscardnoexcept[¶]

Constructs a SXTH #value extend and shift (signed hword extend) (AArch64).

Shift a64::sxtw(
uint32_t value
)constexprstaticnodiscardnoexcept[¶]

Constructs a SXTW #value extend and shift (signed word extend) (AArch64).

Shift a64::sxtx(
uint32_t value
)constexprstaticnodiscardnoexcept[¶]

Constructs a SXTX #value extend and shift (signed dword extend) (AArch64).

Mem a64::ptr(
const Gp& base,
int32_t offset = 0
)constexprstaticnodiscardnoexcept[1/5][¶]

Creates [base, offset] memory operand (offset mode) (AArch64).

Mem a64::ptr_pre(
const Gp& base,
int32_t offset = 0
)constexprstaticnodiscardnoexcept[1/2][¶]

Creates [base, offset]! memory operand (pre-index mode) (AArch64).

Mem a64::ptr_post(
const Gp& base,
int32_t offset = 0
)constexprstaticnodiscardnoexcept[1/2][¶]

Creates [base], offset memory operand (post-index mode) (AArch64).

Mem a64::ptr(
const Gp& base,
const Gp& index
)constexprstaticnodiscardnoexcept[2/5][¶]

Creates [base, index] memory operand (AArch64).

Mem a64::ptr_pre(
const Gp& base,
const Gp& index
)constexprstaticnodiscardnoexcept[2/2][¶]

Creates [base, index]! memory operand (pre-index mode) (AArch64).

Mem a64::ptr_post(
const Gp& base,
const Gp& index
)constexprstaticnodiscardnoexcept[2/2][¶]

Creates [base], index memory operand (post-index mode) (AArch64).

Mem a64::ptr(
const Gp& base,
const Gp& index,
const Shift& shift
)constexprstaticnodiscardnoexcept[3/5][¶]

Creates [base, index, SHIFT_OP #shift] memory operand (AArch64).

Mem a64::ptr(
const Label& base,
int32_t offset = 0
)constexprstaticnodiscardnoexcept[4/5][¶]

Creates [base, offset] memory operand (AArch64).

Mem a64::ptr(
uint64_t base
)constexprstaticnoexcept[5/5][¶]

Creates [base] absolute memory operand (AArch32 or AArch64).

Note

The concept of absolute memory operands doesn't exist on ARM, the ISA only provides PC relative addressing. Absolute memory operands can only be used if it's known that the PC relative offset is encodable and that it would be within the limits. Absolute address is also often output from disassemblers, so AsmJit supports it to make it possible to assemble such output back.

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