AArch64 Backend

AArch64 backend.

Emitters

Supported Instructions

  • Emitters:
    • a64::EmitterExplicitT - Provides all instructions that use explicit operands, provides also utility functions. The member functions provided are part of all AArch64 emitters.
  • Instruction representation:

Register Operands

Memory Operands

  • arm::Mem - AArch32/AArch64 memory operand that provides support for all ARM addressing features including base, index, pre/post increment, and ARM-specific shift addressing and index extending.

Other

  • arm::Shift - Shift operation and value.
  • arm::Utils - Utilities that can help during code generation for AArch32 and AArch64.

Namespaces

Classes

Enumerations

Functions

Variables

Shift Operation Construction

Memory Operand Construction

Enumeration Type Documentation

class a64::VecElementType : uint32_tenumstrong◆ 

Vector element type (AArch64).

ConstantDescription
kNone 

No element type specified.

kB 

Byte elements (B8 or B16).

kH 

Halfword elements (H4 or H8).

kS 

Singleword elements (S2 or S4).

kD 

Doubleword elements (D2).

kB4 

Byte elements grouped by 4 bytes (B4).

Note
This element-type is only used by few instructions.
kH2 

Halfword elements grouped by 2 halfwords (H2).

Note
This element-type is only used by few instructions.
kMaxValue 

Maximum value of VecElementType.

Function Documentation

GpW a64::w(uint32_t id)constexprstaticconstexprnoexcept◆ 

Creates a 32-bit W register operand.

GpX a64::x(uint32_t id)constexprstaticconstexprnoexcept◆ 

Creates a 64-bit X register operand.

VecS a64::s(uint32_t id)constexprstaticconstexprnoexcept[1/3]◆ 

Creates a 32-bit S register operand.

VecD a64::d(uint32_t id)constexprstaticconstexprnoexcept[1/3]◆ 

Creates a 64-bit D register operand.

VecV a64::v(uint32_t id)constexprstaticconstexprnoexcept[1/2]◆ 

Creates a 1282-bit V register operand.

Shift a64::uxtb(uint32_t value)constexprstaticconstexprnoexcept◆ 

Constructs a UXTB #value extend and shift (unsigned byte extend) (AArch64).

Shift a64::uxth(uint32_t value)constexprstaticconstexprnoexcept◆ 

Constructs a UXTH #value extend and shift (unsigned hword extend) (AArch64).

Shift a64::uxtw(uint32_t value)constexprstaticconstexprnoexcept◆ 

Constructs a UXTW #value extend and shift (unsigned word extend) (AArch64).

Shift a64::uxtx(uint32_t value)constexprstaticconstexprnoexcept◆ 

Constructs a UXTX #value extend and shift (unsigned dword extend) (AArch64).

Shift a64::sxtb(uint32_t value)constexprstaticconstexprnoexcept◆ 

Constructs a SXTB #value extend and shift (signed byte extend) (AArch64).

Shift a64::sxth(uint32_t value)constexprstaticconstexprnoexcept◆ 

Constructs a SXTH #value extend and shift (signed hword extend) (AArch64).

Shift a64::sxtw(uint32_t value)constexprstaticconstexprnoexcept◆ 

Constructs a SXTW #value extend and shift (signed word extend) (AArch64).

Shift a64::sxtx(uint32_t value)constexprstaticconstexprnoexcept◆ 

Constructs a SXTX #value extend and shift (signed dword extend) (AArch64).

Mem a64::ptr(const Gp& base, int32_t offset = 0)constexprstaticconstexprnoexcept[1/4]◆ 

Creates [base, offset] memory operand (offset mode) (AArch64).

Mem a64::ptr_pre(const Gp& base, int32_t offset = 0)constexprstaticconstexprnoexcept[1/2]◆ 

Creates [base, offset]! memory operand (pre-index mode) (AArch64).

Mem a64::ptr_post(const Gp& base, int32_t offset = 0)constexprstaticconstexprnoexcept[1/2]◆ 

Creates [base], offset memory operand (post-index mode) (AArch64).

Mem a64::ptr(const Gp& base, const Gp& index)constexprstaticconstexprnoexcept[2/4]◆ 

Creates [base, index] memory operand (AArch64).

Mem a64::ptr_pre(const Gp& base, const Gp& index)constexprstaticconstexprnoexcept[2/2]◆ 

Creates [base, index]! memory operand (pre-index mode) (AArch64).

Mem a64::ptr_post(const Gp& base, const Gp& index)constexprstaticconstexprnoexcept[2/2]◆ 

Creates [base], index memory operand (post-index mode) (AArch64).

Mem a64::ptr(const Gp& base, const Gp& index, const Shift& shift)constexprstaticconstexprnoexcept[3/4]◆ 

Creates [base, index, SHIFT_OP #shift] memory operand (AArch64).

Mem a64::ptr(const Label& base, int32_t offset = 0)constexprstaticconstexprnoexcept[4/4]◆ 

Creates [base, offset] memory operand (AArch64).

VecB a64::Vec::b() constnoexcept[1/2]◆ 

Cast this register to an 8-bit B register (AArch64 only).

VecH a64::Vec::h() constnoexcept[1/2]◆ 

Cast this register to a 16-bit H register (AArch64 only).

VecS a64::Vec::s() constnoexcept[2/3]◆ 

Cast this register to a 32-bit S register.

VecD a64::Vec::d() constnoexcept[2/3]◆ 

Cast this register to a 64-bit D register.

VecV a64::Vec::q() constnoexcept◆ 

Cast this register to a 128-bit Q register.

VecV a64::Vec::v() constnoexcept[2/2]◆ 

Cast this register to a 128-bit V register.

VecV a64::Vec::b(uint32_t elementIndex) constnoexcept[2/2]◆ 

Cast this register to a 128-bit V.B[elementIndex] register.

VecV a64::Vec::h(uint32_t elementIndex) constnoexcept[2/2]◆ 

Cast this register to a 128-bit V.H[elementIndex] register.

VecV a64::Vec::s(uint32_t elementIndex) constnoexcept[3/3]◆ 

Cast this register to a 128-bit V.S[elementIndex] register.

VecV a64::Vec::d(uint32_t elementIndex) constnoexcept[3/3]◆ 

Cast this register to a 128-bit V.D[elementIndex] register.

VecV a64::Vec::h2(uint32_t elementIndex) constnoexcept[1/2]◆ 

Cast this register to a 128-bit V.H2[elementIndex] register.

VecV a64::Vec::b4(uint32_t elementIndex) constnoexcept◆ 

Cast this register to a 128-bit V.B4[elementIndex] register.

VecD a64::Vec::b8() constnoexcept◆ 

Cast this register to V.8B.

VecS a64::Vec::h2() constnoexcept[2/2]◆ 

Cast this register to V.2H.

VecD a64::Vec::h4() constnoexcept◆ 

Cast this register to V.4H.

VecD a64::Vec::s2() constnoexcept◆ 

Cast this register to V.2S.

VecV a64::Vec::b16() constnoexcept◆ 

Cast this register to V.16B.

VecV a64::Vec::h8() constnoexcept◆ 

Cast this register to V.8H.

VecV a64::Vec::s4() constnoexcept◆ 

Cast this register to V.4S.

VecV a64::Vec::d2() constnoexcept◆ 

Cast this register to V.2D.