AsmJit
Low-Latency Machine Code Generation
AArch64 backend.
Vector element type (AArch64).
Constant | Description |
---|---|
kNone | No element type specified. |
kB | Byte elements (B8 or B16). |
kH | Halfword elements (H4 or H8). |
kS | Singleword elements (S2 or S4). |
kD | Doubleword elements (D2). |
kB4 | Byte elements grouped by 4 bytes (B4).
|
kH2 | Halfword elements grouped by 2 halfwords (H2).
|
kMaxValue | Maximum value of VecElementType. |
Creates a 32-bit W register operand.
Creates a 64-bit X register operand.
Creates a 32-bit S register operand.
Creates a 64-bit D register operand.
Creates a 1282-bit V register operand.
Constructs a UXTB #value
extend and shift (unsigned byte extend) (AArch64).
Constructs a UXTH #value
extend and shift (unsigned hword extend) (AArch64).
Constructs a UXTW #value
extend and shift (unsigned word extend) (AArch64).
Constructs a UXTX #value
extend and shift (unsigned dword extend) (AArch64).
Constructs a SXTB #value
extend and shift (signed byte extend) (AArch64).
Constructs a SXTH #value
extend and shift (signed hword extend) (AArch64).
Constructs a SXTW #value
extend and shift (signed word extend) (AArch64).
Constructs a SXTX #value
extend and shift (signed dword extend) (AArch64).
0
)constexprstaticconstexprnoexcept[1/4]◆ Creates [base, offset]
memory operand (offset mode) (AArch64).
0
)constexprstaticconstexprnoexcept[1/2]◆ Creates [base, offset]!
memory operand (pre-index mode) (AArch64).
0
)constexprstaticconstexprnoexcept[1/2]◆ Creates [base], offset
memory operand (post-index mode) (AArch64).
Creates [base, index]
memory operand (AArch64).
Creates [base, index]!
memory operand (pre-index mode) (AArch64).
Creates [base], index
memory operand (post-index mode) (AArch64).
Creates [base, index, SHIFT_OP #shift]
memory operand (AArch64).
0
)constexprstaticconstexprnoexcept[4/4]◆ Creates [base, offset]
memory operand (AArch64).
Cast this register to an 8-bit B register (AArch64 only).
Cast this register to a 16-bit H register (AArch64 only).
Cast this register to a 32-bit S register.
Cast this register to a 64-bit D register.
Cast this register to a 128-bit Q register.
Cast this register to a 128-bit V register.
Casts this register to b (clone).
Casts this register to h (clone).
Casts this register to s (clone).
Casts this register to d (clone).
Casts this register to q (clone).
Cast this register to a 128-bit V.B[elementIndex] register.
Cast this register to a 128-bit V.H[elementIndex] register.
Cast this register to a 128-bit V.S[elementIndex] register.
Cast this register to a 128-bit V.D[elementIndex] register.
Cast this register to a 128-bit V.H2[elementIndex] register.
Cast this register to a 128-bit V.B4[elementIndex] register.
Cast this register to V.8B.
Cast this register to V.2H.
Cast this register to V.4H.
Cast this register to V.2S.
Cast this register to V.16B.
Cast this register to V.8H.
Cast this register to V.4S.
Cast this register to V.2D.