AsmJit
Low-Latency Machine Code Generation
X86/X64 backend.
CMP[PD|PS|SD|SS]
predicate (SSE+).[V]PCMP[I|E]STR[I|M]
predicate (SSE4.1+, AVX+).[V]ROUND[PD|PS|SD|SS]
predicate (SSE+, AVX+).VCMP[PD|PS|SD|SS]
predicate (AVX+).VFIXUPIMM[PD|PS|SD|SS]
predicate (AVX512+).VFPCLASS[PD|PS|SD|SS]
predicate (AVX512+).VGETMANT[PD|PS|SD|SS]
predicate (AVX512+).VPCMP[U][B|W|D|Q]
predicate (AVX512+).VPCOM[U][B|W|D|Q]
predicate (XOP).VRANGE[PD|PS|SD|SS]
predicate (AVX512+).REDUCE[PD|PS|SD|SS]
predicate (AVX512+).VPTERNLOG[D|Q]
predicate and operations (AVX512+). Condition code.
FPU status word bits.
FPU control word bits.
An immediate value that can be used with CMP[PD|PS|SD|SS] instructions.
Constant | Description |
---|---|
kEQ | Equal (Quiet), same as VCmpImm::kEQ_OQ. |
kLT | Less (Signaling), same as VCmpImm::kLT_OS. |
kLE | Less/Equal (Signaling), same as VCmpImm::kLE_OS. |
kUNORD | Unordered (Quiet), same as VCmpImm::kUNORD_Q. |
kNEQ | Not Equal (Quiet), same as VCmpImm::kNEQ_UQ. |
kNLT | Not Less (Signaling), same as VCmpImm::kNLT_US. |
kNLE | Not Less/Equal (Signaling), same as VCmpImm::kNLE_US. |
kORD | Ordered (Quiet), same as VCmpImm::kORD_Q. |
An immediate value that can be used with [V]PCMP[I|E]STR[I|M] instructions.
An immediate value that can be used with ROUND[PD|PS|SD|SS] instructions.
kSuppress
is a mask that can be used with any other value. An immediate value that can be used with VCMP[PD|PS|SD|SS] instructions (AVX).
The first 8 values are compatible with CmpImm.
Constant | Description |
---|---|
kEQ_OQ | Equal (Quiet , Ordered) , same as CmpImm::kEQ. |
kLT_OS | Less (Signaling, Ordered) , same as CmpImm::kLT. |
kLE_OS | Less/Equal (Signaling, Ordered) , same as CmpImm::kLE. |
kUNORD_Q | Unordered (Quiet) , same as CmpImm::kUNORD. |
kNEQ_UQ | Not Equal (Quiet , Unordered), same as CmpImm::kNEQ. |
kNLT_US | Not Less (Signaling, Unordered), same as CmpImm::kNLT. |
kNLE_US | Not Less/Equal (Signaling, Unordered), same as CmpImm::kNLE. |
kORD_Q | Ordered (Quiet) , same as CmpImm::kORD. |
kEQ_UQ | Equal (Quiet , Unordered). |
kNGE_US | Not Greater/Equal (Signaling, Unordered). |
kNGT_US | Not Greater (Signaling, Unordered). |
kFALSE_OQ | False (Quiet , Ordered). |
kNEQ_OQ | Not Equal (Quiet , Ordered). |
kGE_OS | Greater/Equal (Signaling, Ordered). |
kGT_OS | Greater (Signaling, Ordered). |
kTRUE_UQ | True (Quiet , Unordered). |
kEQ_OS | Equal (Signaling, Ordered). |
kLT_OQ | Less (Quiet , Ordered). |
kLE_OQ | Less/Equal (Quiet , Ordered). |
kUNORD_S | Unordered (Signaling). |
kNEQ_US | Not Equal (Signaling, Unordered). |
kNLT_UQ | Not Less (Quiet , Unordered). |
kNLE_UQ | Not Less/Equal (Quiet , Unordered). |
kORD_S | Ordered (Signaling). |
kEQ_US | Equal (Signaling, Unordered). |
kNGE_UQ | Not Greater/Equal (Quiet , Unordered). |
kNGT_UQ | Not Greater (Quiet , Unordered). |
kFALSE_OS | False (Signaling, Ordered). |
kNEQ_OS | Not Equal (Signaling, Ordered). |
kGE_OQ | Greater/Equal (Quiet , Ordered). |
kGT_OQ | Greater (Quiet , Ordered). |
kTRUE_US | True (Signaling, Unordered). |
An immediate value that can be used with VFIXUPIMM[PD|PS|SD|SS] instructions (AVX-512).
The final immediate is a combination of all possible control bits.
An immediate value that can be used with VFPCLASS[PD|PS|SD|SS] instructions (AVX-512).
The values can be combined together to form the final 8-bit mask.
An immediate value that can be used with VGETMANT[PD|PS|SD|SS] instructions (AVX-512).
The value is a combination of a normalization interval and a sign control.
A predicate used by VRANGE[PD|PS|SD|SS] instructions (AVX-512).
A predicate that can be used as an immediate value with VPTERNLOG[D|Q] instruction.
There are 3 inputs to the instruction (kA, kB, kC). Ternary logic can define any combination that would be performed on these 3 inputs to get the desired output - any combination of AND, OR, XOR, NOT is possible.
Reverses a condition code (reverses the corresponding operands of a comparison).
Negates a condition code.
Creates a VReduceImm from a combination of flags
and fixedPointLength
.
Creates an immediate that can be used by VPTERNLOG[D|Q] instructions.
Creates an if/else logic that can be used by VPTERNLOG[D|Q] instructions.
Creates a shuffle immediate value that be used with SSE/AVX/AVX-512 instructions to shuffle 2 elements in a vector.
a | Position of the first component [0, 1]. |
b | Position of the second component [0, 1]. |
Shuffle constants can be used to encode an immediate for these instructions:
shufpd|vshufpd
Creates a shuffle immediate value that be used with SSE/AVX/AVX-512 instructions to shuffle 4 elements in a vector.
a | Position of the first component [0, 3]. |
b | Position of the second component [0, 3]. |
c | Position of the third component [0, 3]. |
d | Position of the fourth component [0, 3]. |
Shuffle constants can be used to encode an immediate for these instructions:
pshufw
pshuflw|vpshuflw
pshufhw|vpshufhw
pshufd|vpshufd
shufps|vshufps
Creates an 8-bit low GPB register operand.
Creates an 8-bit low GPB register operand.
Creates an 8-bit high GPB register operand.
Creates a 16-bit GPW register operand.
Creates a 32-bit GPD register operand.
Creates a 64-bit GPQ register operand (64-bit).
Creates a 128-bit XMM register operand.
Creates a 256-bit YMM register operand.
Creates a 512-bit ZMM register operand.
Creates a 64-bit Mm register operand.
Creates a 64-bit K register operand.
Creates a 32-bit or 64-bit control register operand.
Creates a 32-bit or 64-bit debug register operand.
Creates an 80-bit st register operand.
Creates a 128-bit bound register operand.
Creates a TMM register operand.
0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[1/10]◆ Creates [base.reg + offset]
memory operand.
0
, int32_t offset = 0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[2/10]◆ Creates [base.reg + (index << shift) + offset]
memory operand (scalar index).
0
, int32_t offset = 0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[3/10]◆ Creates [base.reg + (index << shift) + offset]
memory operand (vector index).
0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[4/10]◆ Creates [base + offset]
memory operand.
0
, int32_t offset = 0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[5/10]◆ Creates [base + (index << shift) + offset]
memory operand.
0
, int32_t offset = 0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[6/10]◆ Creates [base + (index << shift) + offset]
memory operand.
0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[7/10]◆ Creates [rip + offset]
memory operand.
0
)constexprstaticconstexprnoexcept[8/10]◆ Creates [base]
absolute memory operand.
0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[9/10]◆ Creates [base + (index.reg << shift)]
absolute memory operand.
0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[10/10]◆ Creates [base + (index.reg << shift)]
absolute memory operand.
0
)constexprstaticconstexprnoexcept[1/3]◆ Creates [base]
absolute memory operand (absolute).
0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[2/3]◆ Creates [base + (index.reg << shift)]
absolute memory operand (absolute).
0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[3/3]◆ Creates [base + (index.reg << shift)]
absolute memory operand (absolute).
0
)constexprstaticconstexprnoexcept[1/3]◆ Creates [base]
relative memory operand (relative).
0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[2/3]◆ Creates [base + (index.reg << shift)]
relative memory operand (relative).
0
, uint32_t size = 0
)constexprstaticconstexprnoexcept[3/3]◆ Creates [base + (index.reg << shift)]
relative memory operand (relative).