asmjit::arm::Utils Namespace Reference

Public utilities and helpers for targeting AArch32 and AArch64 architectures.

Classes

Functions

Function Documentation

bool arm::Utils::encodeAArch32Imm(uint64_t imm, uint32_t* encodedImmOut)staticnoexcept◆ 

Encodes a 12-bit immediate part of opcode that ise used by a standard 32-bit ARM encoding.

bool arm::Utils::encodeLogicalImm(uint64_t imm, uint32_t width, LogicalImm* out)staticnoexcept◆ 

Encodes the given imm value of the given width to a logical immediate value represented as N, S, and R fields and writes these fields to out.

Encoding Table:

+---+--------+--------+------+
| N | ImmS | ImmR | Size |
+---+--------+--------+------+
| 1 | ssssss | rrrrrr | 64 |
| 0 | 0sssss | .rrrrr | 32 |
| 0 | 10ssss | ..rrrr | 16 |
| 0 | 110sss | ...rrr | 8 |
| 0 | 1110ss | ....rr | 4 |
| 0 | 11110s | .....r | 2 |
+---+--------+--------+------+

bool arm::Utils::isLogicalImm(uint64_t imm, uint32_t width)staticnoexcept◆ 

Returns true if the given imm value is encodable as a logical immediate.

The width argument describes the width of the operation, and must be either 32 or 64. This function can be used to test whether an immediate value can be used with AND, ANDS, BIC, BICS, EON, EOR, ORN, and ORR instruction.

bool arm::Utils::isAddSubImm(uint64_t imm)staticnoexcept◆ 

Returns true if the given imm value is encodable as an immediate with add and sub instructions on AArch64.

These two instructions can encode 12-bit immediate value optionally shifted left by 12 bits.

template<typename T>
bool arm::Utils::isByteMaskImm8(const T& imm)staticnoexcept◆ 

Returns true if the given imm value is a byte mask.

Byte mask has each byte part of the value set to either 0x00 or 0xFF. Some ARM instructions accept immediates that form a byte-mask and this function can be used to verify that the immediate is encodable before using the value.

bool arm::Utils::isFP16Imm8(uint32_t val)staticnoexcept◆ 

Returns true if the given half precision floating point val can be encoded as ARM IMM8 value, which represents a limited set of floating point immediate values, which can be used with FMOV instruction.

The floating point must have bits distributed in the following way:

[aBbbcdef|gh000000]

bool arm::Utils::isFP32Imm8(uint32_t val)staticnoexcept[1/2]◆ 

Returns true if the given single precision floating point val can be encoded as ARM IMM8 value, which represents a limited set of floating point immediate values, which can be used with FMOV instruction.

The floating point must have bits distributed in the following way:

[aBbbbbbc|defgh000|00000000|00000000]

bool arm::Utils::isFP32Imm8(float val)staticnoexcept[2/2]◆ 

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

bool arm::Utils::isFP64Imm8(uint64_t val)staticnoexcept[1/2]◆ 

Returns true if the given double precision floating point val can be encoded as ARM IMM8 value, which represents a limited set of floating point immediate values, which can be used with FMOV instruction.

The floating point must have bits distributed in the following way:

[aBbbbbbb|bbcdefgh|00000000|00000000|00000000|00000000|00000000|00000000]

bool arm::Utils::isFP64Imm8(double val)staticnoexcept[2/2]◆ 

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

uint32_t arm::Utils::encodeFP64ToImm8(uint64_t val)staticnoexcept[1/2]◆ 

Encodes a double precision floating point value into IMM8 format.

Note
This function expects that isFP64Imm8(val) == true so it doesn't perform any checks of the value and just rearranges some bits into Imm8 order.

uint32_t arm::Utils::encodeFP64ToImm8(double val)staticnoexcept[2/2]◆ 

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.