IndexAArch64 Backendasmjit::a64::Compiler

asmjit::a64::Compiler Class Reference [¶]

Inheritance diagram for asmjit::a64::Compiler:
asmjit::BaseCompiler asmjit::a64::EmitterExplicitT< Compiler > asmjit::BaseBuilder asmjit::BaseEmitter

AArch64 compiler implementation.

Public Types

Public Types inherited from asmjit::BaseCompiler
Public Types inherited from asmjit::BaseBuilder

Member Functions

Construction & Destruction

Virtual Registers

Stack

Constants

Instruction Options

Compiler specific

Function Call & Ret Intrinsics

Jump Tables Support

Events

Finalize

Public Member Functions inherited from asmjit::BaseCompiler
Public Member Functions inherited from asmjit::BaseBuilder
Public Member Functions inherited from asmjit::BaseEmitter
Public Member Functions inherited from asmjit::a64::EmitterExplicitT< Compiler >

template<typename... Args>
Gp a64::Compiler::new_gp(
TypeId type_id,
Args&&... args
)[¶]

Creates a new general-purpose register with type_id type and optional name passed via args.

Note

Using TypeId is too generic. In general it's recommended to use new_gp32(), new_gp64(), and new_gpz() or new_gp_ptr().

template<typename... Args>
Vec a64::Compiler::new_vec(
TypeId type_id,
Args&&... args
)[¶]

Creates a new vector register with type_id type and optional name passed via args.

Note

Using TypeId is too generic. In general it's recommended to use new_vec128(), new_vec_s(), new_vec_d(), new_vec_q(), ...

template<typename... Args>
Gp a64::Compiler::new_gp32(
Args&&... args
)[¶]

Creates a new 32-bit general purpose register mapped to low 32 bits of a full register (on 64-bit targets).

template<typename... Args>
Gp a64::Compiler::new_gp64(
Args&&... args
)[¶]

Creates a new 64-bit general purpose register.

template<typename... Args>
Gp a64::Compiler::new_gpw(
Args&&... args
)[¶]

Creates a new 32-bit general purpose register.

Note

This is a convenience function alias of new_gp32().

template<typename... Args>
Gp a64::Compiler::new_gpx(
Args&&... args
)[¶]

Creates a new 64-bit general purpose register.

Note

This is a convenience function alias of new_gp64().

template<typename... Args>
Gp a64::Compiler::new_gpz(
Args&&... args
)[¶]

Creates a new 32-bit or 64-bit general purpose register depending on the target register width.

Note

This is a convenience function, on aarch64 target it always creates a 64-bit general-purpose register.

template<typename... Args>
Gp a64::Compiler::new_gp_ptr(
Args&&... args
)[¶]

Creates a new 32-bit or 64-bit general purpose register depending on the target register width.

Note

This is a convenience function, on aarch64 target it always creates a 64-bit general-purpose register.

template<typename... Args>
Vec a64::Compiler::new_vec128(
Args&&... args
)[¶]

Creates a new 128-bit vector register.

template<typename... Args>
Vec a64::Compiler::new_vec128_f32x1(
Args&&... args
)[¶]

Creates a new 128-bit vector register that will be used for scalar 32-bit floating point operation.

template<typename... Args>
Vec a64::Compiler::new_vec128_f64x1(
Args&&... args
)[¶]

Creates a new 128-bit vector register that will be used for scalar 64-bit floating point operation.

template<typename... Args>
Vec a64::Compiler::new_vec128_f32x4(
Args&&... args
)[¶]

Creates a new 128-bit vector register that will be used for packed 32-bit floating point operation.

template<typename... Args>
Vec a64::Compiler::new_vec128_f64x2(
Args&&... args
)[¶]

Creates a new 128-bit vector register that will be used for packed 64-bit floating point operation.

template<typename... Args>
Vec a64::Compiler::new_vec_s(
Args&&... args
)[¶]

Creates a new 32-bit vector register (S).

Note

This may look like an alias of new_vec128_f32x1(), but it's not. This really creates a 32-bit register, which has a type RegType::kVec32, whereas new_vec128_f32x1() creates a register, which has a type RegType::kVec64

template<typename... Args>
Vec a64::Compiler::new_vec_d(
Args&&... args
)[¶]

Alias of new_vec128_f64x1() that matches aarch64 architecture terminology.

template<typename... Args>
Vec a64::Compiler::new_vec_q(
Args&&... args
)[¶]

Alias of new_vec128() that matches aarch64 architecture terminology.

Mem a64::Compiler::new_stack(
uint32_t size,
uint32_t alignment,
const char* name = nullptr
)[¶]

Creates a new stack and returns a Mem operand that can be used to address it.

Mem a64::Compiler::new_const(
const void* data,
size_t size
)[¶]

Put data to a constant-pool and get a memory reference to it.

Mem a64::Compiler::new_byte_const(
uint8_t val
)noexcept[¶]

Put a BYTE val to a constant-pool (8 bits).

Mem a64::Compiler::new_half_const(
uint16_t val
)noexcept[¶]

Put a HWORD val to a constant-pool (16 bits).

Mem a64::Compiler::new_word_const(
uint32_t val
)noexcept[¶]

Put a WORD val to a constant-pool (32 bits).

Mem a64::Compiler::new_dword_const(
uint64_t val
)noexcept[¶]

Put a DWORD val to a constant-pool (64 bits).

Mem a64::Compiler::new_int16_const(
int16_t val
)noexcept[¶]

Put a WORD val to a constant-pool.

Mem a64::Compiler::new_uint16_const(
uint16_t val
)noexcept[¶]

Put a WORD val to a constant-pool.

Mem a64::Compiler::new_int32_const(
int32_t val
)noexcept[¶]

Put a DWORD val to a constant-pool.

Mem a64::Compiler::new_uint32_const(
uint32_t val
)noexcept[¶]

Put a DWORD val to a constant-pool.

Mem a64::Compiler::new_int64_const(
int64_t val
)noexcept[¶]

Put a QWORD val to a constant-pool.

Mem a64::Compiler::new_uint64_const(
uint64_t val
)noexcept[¶]

Put a QWORD val to a constant-pool.

Mem a64::Compiler::new_float_const(
float val
)noexcept[¶]

Put a SP-FP val to a constant-pool.

Mem a64::Compiler::new_double_const(
double val
)noexcept[¶]

Put a DP-FP val to a constant-pool.

Compiler& a64::Compiler::unfollow()noexcept[¶]

Force the compiler to not follow the conditional or unconditional jump.

Error a64::Compiler::load_address_of(
const Gp& o0,
const Mem& o1
)[¶]

Special pseudo-instruction that can be used to load a memory address into o0 GP register.

Note

At the moment this instruction is only useful to load a stack allocated address into a GP register for further use. It makes very little sense to use it for anything else. The semantics of this instruction is the same as X86 LEA (load effective address) instruction.

Error a64::Compiler::invoke_(
Out<InvokeNode*> out,
const Operand_& target,
const FuncSignature& signature
)[¶]

Invoke a function call without target type enforcement.

Error a64::Compiler::invoke(
Out<InvokeNode*> out,
const Gp& target,
const FuncSignature& signature
)[1/5][¶]

Invoke a function call of the given target and signature and store the added node to out.

Creates a new InvokeNode, initializes all the necessary members to match the given function signature, adds the node to the compiler, and stores its pointer to out. The operation is atomic, if anything fails nullptr is stored in out and error code is returned.

Error a64::Compiler::invoke(
Out<InvokeNode*> out,
const Mem& target,
const FuncSignature& signature
)[2/5][¶]

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

Error a64::Compiler::invoke(
Out<InvokeNode*> out,
const Label& target,
const FuncSignature& signature
)[3/5][¶]

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

Error a64::Compiler::invoke(
Out<InvokeNode*> out,
const Imm& target,
const FuncSignature& signature
)[4/5][¶]

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

Error a64::Compiler::invoke(
Out<InvokeNode*> out,
uint64_t target,
const FuncSignature& signature
)[5/5][¶]

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

Error a64::Compiler::ret()[1/3][¶]

Return.

Error a64::Compiler::ret(
const Reg& o0
)[2/3][¶]

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

Error a64::Compiler::ret(
const Reg& o0,
const Reg& o1
)[3/3][¶]

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

Error a64::Compiler::br(
const Reg& target,
JumpAnnotation* annotation
)[¶]

Adds a jump to the given target with the provided jump annotation.

Error a64::Compiler::on_attach()overridenoexcept[¶]

Called after the emitter was attached to CodeHolder.

Reimplemented from asmjit::BaseCompiler.

Error a64::Compiler::on_detach()overridenoexcept[¶]

Called after the emitter was detached from CodeHolder.

Reimplemented from asmjit::BaseCompiler.

Error a64::Compiler::on_reinit()overridenoexcept[¶]

Called when CodeHolder is reinitialized when the emitter is attached.

Reimplemented from asmjit::BaseCompiler.

Error a64::Compiler::finalize()override[¶]

Finalizes this emitter.

Materializes the content of the emitter by serializing it to the attached CodeHolder through an architecture specific BaseAssembler. This function won't do anything if the emitter inherits from BaseAssembler as assemblers emit directly to a CodeBuffer held by CodeHolder. However, if this is an emitter that inherits from BaseBuilder or BaseCompiler then these emitters need the materialization phase as they store their content in a representation not visible to CodeHolder.

Reimplemented from asmjit::BaseEmitter.