asmjit::BaseInst Class Reference

Instruction id, options, and extraReg in a single structure.

This structure exists mainly to simplify analysis and validation API that requires BaseInst and Operand[] array.

Public Members

Public Types

Member Functions

Construction & Destruction
Instruction ID
Instruction Options
Extra Register

Member Enumeration Documentation

BaseInst::Id : uint32_tenum


Invalid or uninitialized instruction id.


Abstract instruction (BaseBuilder and BaseCompiler).

BaseInst::Options : uint32_tenum


Used internally by emitters for handling errors and rare cases.


Prevents following a jump during compilation (BaseCompiler).


Overwrite the destination operand(s) (BaseCompiler).

Hint that is important for register liveness analysis. It tells the
compiler that the destination operand will be overwritten now or by
adjacent instructions. BaseCompiler knows when a register is completely
overwritten by a single instruction, for example you don't have to
mark "movaps" or "pxor x, x", however, if a pair of instructions is
used and the first of them doesn't completely overwrite the content
of the destination, BaseCompiler fails to mark that register as dead.

X86 Specific

  - All instructions that always overwrite at least the size of the
    register the virtual-register uses , for example "mov", "movq",
    "movaps" don't need the overwrite option to be used - conversion,
    shuffle, and other miscellaneous instructions included.

  - All instructions that clear the destination register if all operands
    are the same, for example "xor x, x", "pcmpeqb x x", etc...

  - Consecutive instructions that partially overwrite the variable until
    there is no old content require `BaseCompiler::overwrite()` to be used.
    Some examples (not always the best use cases thought):

    - `movlps xmm0, ?` followed by `movhps xmm0, ?` and vice versa
    - `movlpd xmm0, ?` followed by `movhpd xmm0, ?` and vice versa
    - `mov al, ?` followed by `and ax, 0xFF`
    - `mov al, ?` followed by `mov ah, al`
    - `pinsrq xmm0, ?, 0` followed by `pinsrq xmm0, ?, 1`

  - If allocated variable is used temporarily for scalar operations. For
    example if you allocate a full vector like `x86::Compiler::newXmm()`
    and then use that vector for scalar operations you should use
    `overwrite()` directive:

    - `sqrtss x, y` - only LO element of `x` is changed, if you don't
      use HI elements, use `compiler.overwrite().sqrtss(x, y)`. 

Emit short-form of the instruction.


Emit long-form of the instruction.


Conditional jump is likely to be taken.


Conditional jump is unlikely to be taken.

BaseInst::ControlType : uint32_tenum

Control type.


No control type (doesn't jump).


Unconditional jump.


Conditional jump (branch).


Function call.


Function return.

Constructor & Destructor Documentation

BaseInst::BaseInst(uint32_t id = 0, uint32_t options = 0)explicitnoexcept

Creates a new BaseInst instance with id and options set.

Default values of id and options are zero, which means none instruciton. Such instruction is guaranteed to never exist for any architecture supported by AsmJit.

Member Function Documentation

uint32_t BaseInst::id() constnoexcept

Returns the instruction id.

void BaseInst::setId(uint32_t id)noexcept

Sets the instruction id to the given id.

void BaseInst::resetId()noexcept

Resets the instruction id to zero, see kIdNone.

Member Data Documentation

uint32_t BaseInst::_id

Instruction id, see BaseInst::Id or {arch-specific}Inst::Id.

uint32_t BaseInst::_options

Instruction options, see BaseInst::Options or {arch-specific}Inst::Options.

RegOnly BaseInst::_extraReg

Extra register used by instruction (either REP register or AVX-512 selector).