asmjit::x86::InstDB Namespace Reference

Instruction database (X86).

Classes

Enumerations

Functions

Variables

Enumeration Type Documentation

class x86::InstDB::Mode : uint8_tenumstrong◆ 

Describes which operation mode is supported by an instruction.

ConstantDescription
kNone 

Invalid mode.

kX86 

X86 mode supported.

kX64 

X64 mode supported.

kAny 

Both X86 and X64 modes supported.

class x86::InstDB::OpFlags : uint64_tenumstrong◆ 

Operand signature flags used by OpSignature.

ConstantDescription
kNone 

No operand flags.

kRegGpbLo 

Operand can be low 8-bit GPB register.

kRegGpbHi 

Operand can be high 8-bit GPB register.

kRegGpw 

Operand can be 16-bit GPW register.

kRegGpd 

Operand can be 32-bit GPD register.

kRegGpq 

Operand can be 64-bit GPQ register.

kRegXmm 

Operand can be 128-bit XMM register.

kRegYmm 

Operand can be 256-bit YMM register.

kRegZmm 

Operand can be 512-bit ZMM register.

kRegMm 

Operand can be 64-bit MM register.

kRegKReg 

Operand can be 64-bit K register.

kRegSReg 

Operand can be SReg (segment register).

kRegCReg 

Operand can be CReg (control register).

kRegDReg 

Operand can be DReg (debug register).

kRegSt 

Operand can be 80-bit ST register (X87).

kRegBnd 

Operand can be 128-bit BND register.

kRegTmm 

Operand can be 0..8192-bit TMM register.

kRegMask 

Mask of all possible register types.

kMemUnspecified 

Operand can be a scalar memory pointer without size.

kMem8 

Operand can be an 8-bit memory pointer.

kMem16 

Operand can be a 16-bit memory pointer.

kMem32 

Operand can be a 32-bit memory pointer.

kMem48 

Operand can be a 48-bit memory pointer (FAR pointers only).

kMem64 

Operand can be a 64-bit memory pointer.

kMem80 

Operand can be an 80-bit memory pointer.

kMem128 

Operand can be a 128-bit memory pointer.

kMem256 

Operand can be a 256-bit memory pointer.

kMem512 

Operand can be a 512-bit memory pointer.

kMem1024 

Operand can be a 1024-bit memory pointer.

kMemMask 

Mask of all possible scalar memory types.

kVm32x 

Operand can be a vm32x (vector) pointer.

kVm32y 

Operand can be a vm32y (vector) pointer.

kVm32z 

Operand can be a vm32z (vector) pointer.

kVm64x 

Operand can be a vm64x (vector) pointer.

kVm64y 

Operand can be a vm64y (vector) pointer.

kVm64z 

Operand can be a vm64z (vector) pointer.

kVmMask 

Mask of all possible vector memory types.

kImmI4 

Operand can be signed 4-bit immediate.

kImmU4 

Operand can be unsigned 4-bit immediate.

kImmI8 

Operand can be signed 8-bit immediate.

kImmU8 

Operand can be unsigned 8-bit immediate.

kImmI16 

Operand can be signed 16-bit immediate.

kImmU16 

Operand can be unsigned 16-bit immediate.

kImmI32 

Operand can be signed 32-bit immediate.

kImmU32 

Operand can be unsigned 32-bit immediate.

kImmI64 

Operand can be signed 64-bit immediate.

kImmU64 

Operand can be unsigned 64-bit immediate.

kImmMask 

Mask of all immediate types.

kRel8 

Operand can be relative 8-bit displacement.

kRel32 

Operand can be relative 32-bit displacement.

kRelMask 

Mask of all relative displacement types.

kFlagMemBase 

Flag: Only memory base is allowed (no index, no offset).

kFlagMemDs 

Flag: Implicit memory operand's DS segment.

kFlagMemEs 

Flag: Implicit memory operand's ES segment.

kFlagMib 

Flag: Operand is MIB (base+index) pointer.

kFlagTMem 

Flag: Operand is TMEM (sib_mem), AMX memory pointer.

kFlagImplicit 

Flag: Operand is implicit.

kFlagMask 

Mask of all flags.

kOpMask 

Contains mask of all registers, memory operands, immediate operands, and displacement operands.

class x86::InstDB::InstFlags : uint32_tenumstrong◆ 

Instruction flags.

Details about instruction encoding, operation, features, and some limitations.

ConstantDescription
kNone 

No flags.

kFpu 

Instruction that accesses FPU registers.

kMmx 

Instruction that accesses MMX registers (including 3DNOW and GEODE) and EMMS.

kVec 

Instruction that accesses XMM registers (SSE, AVX, AVX512).

kFpuM16 

FPU instruction can address word_ptr (shared with M80).

kFpuM32 

FPU instruction can address dword_ptr.

kFpuM64 

FPU instruction can address qword_ptr.

kFpuM80 

FPU instruction can address tword_ptr (shared with M16).

kRep 

Instruction can be prefixed with using the REP(REPE) or REPNE prefix.

kRepIgnored 

Rep prefix is accepted, but it has no effect other than being emitted with the instruction (as an extra byte).

kLock 

Instruction can be prefixed with using the LOCK prefix.

kXAcquire 

Instruction can be prefixed with using the XACQUIRE prefix.

kXRelease 

Instruction can be prefixed with using the XRELEASE prefix.

kMib 

Instruction uses MIB (BNDLDX|BNDSTX) to encode two registers.

kVsib 

Instruction uses VSIB instead of legacy SIB.

kTsib 

Instruction uses TSIB (or SIB_MEM) encoding (MODRM followed by SIB).

kVex 

Instruction can be encoded by VEX|XOP (AVX|AVX2|BMI|XOP|...).

kEvex 

Instruction can be encoded by EVEX (AVX512).

kPreferEvex 

EVEX encoding is preferred over VEX encoding (AVX515_VNNI vs AVX_VNNI).

kEvexCompat 

EVEX and VEX signatures are compatible.

kEvexKReg 

EVEX instruction requires K register in the first operand (compare instructions).

kEvexTwoOp 

EVEX instruction requires two operands and K register as a selector (gather instructions).

kEvexTransformable 

VEX instruction that can be transformed to a compatible EVEX instruction.

kConsecutiveRegs 

Instruction uses consecutive registers.

Used by V4FMADDPS, V4FMADDSS, V4FNMADDPS, V4FNMADDSS, VP4DPWSSD, VP4DPWSSDS, VP2INTERSECTD, and VP2INTERSECTQ instructions

class x86::InstDB::Avx512Flags : uint32_tenumstrong◆ 

AVX-512 flags.

ConstantDescription
kNone 

No AVX-512 flags.

k_ 

Internally used in tables, has no meaning.

kK 

Supports masking {k1..k7}.

kZ 

Supports zeroing {z}, must be used together with kAvx512k.

kER 

Supports 'embedded-rounding' {er} with implicit {sae},.

kSAE 

Supports 'suppress-all-exceptions' {sae}.

kB16 

Supports 16-bit broadcast 'b16'.

kB32 

Supports 32-bit broadcast 'b32'.

kB64 

Supports 64-bit broadcast 'b64'.

kT4X 

Operates on a vector of consecutive registers (AVX512_4FMAPS and AVX512_4VNNIW).

kImplicitZ 

Implicit zeroing if {k} masking is used. Using {z} is not valid in this case as it's implicit.

Function Documentation

Mode x86::InstDB::modeFromArch(Arch arch)constexprstaticconstexprnoexcept◆ 

Converts architecture to operation mode, see Mode.