
AsmJit
Low-Latency Machine Code Generation
Unified vector register (also acts as a base class for architecture specific vector registers).
Default constructor that only setups basics.
Makes a copy of the other
register operand.
Makes a copy of the other
register having id set to id
Creates a register based on signature
and id
.
Creates a completely uninitialized UniVec register operand (garbage).
Creates a new register from register type and id.
Creates a new 128-bit vector register having the given register id regId
.
Creates a new 256-bit vector register having the given register id regId
.
Creates a new 512-bit vector register having the given register id regId
.
Clones and casts this register to a 128-bit vector register.