
AsmJit
Low-Latency Machine Code Generation
Architecture traits used by Function API and Compiler's register allocator.
Returns stack pointer register id (always GP register).
Returns stack frame register id (always GP register).
Returns link register id, if the architecture provides it (always GP register).
Returns program counter register id, if the architecture exposes it (always GP register).
Returns a hardware stack alignment requirement.
Tests whether the architecture provides link register, which is used across function calls.
If the link register is not provided then a function call pushes the return address on stack (X86/X64).
Returns minimum addressable offset on stack guaranteed for all instructions.
Returns maximum addressable offset on stack depending on specific instruction.
Returns ISA flags of the given register group
.
Tests whether the given register group
has the given flag
set.
Tests whether the ISA provides register swap instruction for the given register group
.
Tests whether the ISA provides push/pop instructions for the given register group
.
Returns a table of ISA word names that appear in formatted text.
Word names are ISA dependent.
The index of this table is log2 of the size:
Returns an ISA word name identifier of the given index
, see typeNameIdTable() for more details.
Returns a const reference to ArchTraits
for the given architecture arch
.
Stack pointer register id.
Frame pointer register id.
Link register id.
Instruction pointer (or program counter) register id, if accessible.
Hardware stack alignment requirement.
Minimum addressable offset on stack guaranteed for all instructions.
Maximum addressable offset on stack depending on specific instruction.
Bit-mask indexed by RegType that describes, which register types are supported by the ISA.
Flags for each virtual register group.
Maps scalar TypeId values (from TypeId::_kIdBaseStart) to register types, see TypeId.
Word name identifiers of 8-bit, 16-bit, 32-bit, and 64-bit quantities that appear in formatted text.